93LC66B DataSheet
DATASHEET
93LC66B Description
Port 3 pins P3.0 to P3.5, P3.7 are seven bi-directional I/O pins with internal pull-ups. P3.6 is hard-wired as an input to the output of the on-chip comparator and is not accessible as a general-purpose I/O pin. The Port 3 output buffers can sink 20 mA. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups.
93LC66B Features
The CS8920As Ethernet Media Access Control (MAC) engine is fully compliant with the IEEE 802.3 Ethernet standard (ISO/IEC 8802-3, 1993), and supports full-duplex operation. The full-du- plex mode may be entered by a command from the host, or via auto-negotiation using link-pulse signaling.
93LC66B Applicatioins
VIA C3 800MHz Embedded CPU Supports 66/100/133MHz FSB Two DIMM sockets with a max. capacity of 1GB VIA VT8601/VT82C686B system chipset SMC 37C669, VIA VT82C686B super I/O chipset VIA VT8601 CRT display controller Dual RealTek RTL8100 10/100 Based LAN