ACST2-8SB-TR DataSheet
DATASHEET
ACST2-8SB-TR Description
EN 1: The negative logic input that enables the module output. This pin is TTL compatible and referenced to CVin. A logic 0 at this pin enables the modules outputs. A logic 1 or high impedance disables the modules outputs. If not used, the pin must be connected to CVin.
ACST2-8SB-TR Features
There is a potentiometer, R24 that is used to manually trim the output offset to 0Vdc. Please refer to the Board Connection Diagram for the potentiometer location on the ACST2-8SB-TR Parallel Reference Board. The Reference Board is shipped the output offset nulled within +/-10mV.
ACST2-8SB-TR Applicatioins
Technical/Catalog InformationACST2-8SB-TRVendorSTMicroelectronics (VA)CategoryDiscrete Semiconductor Products Triac Type