TLV320AIC23BPWR DataSheet
DATASHEET
TLV320AIC23BPWR Description
2.7 to 6.0 V Input Voltage Range Output Voltage from Vbat to 15 V 3.0 mA Quiescent Supply Current Automatically LEDs Current Matching No External Sense Resistor Includes Dimming Function Programmable or Automatic Current Output Mode LOCAL or REMOTE Control Facility Photo Transistor Sense Feedback Input Inductor Based Converter brings High Efficiency Low Noise DC/DC Converter All Pins are Fully ESD Protected
TLV320AIC23BPWR Features
READ: The ATTLV320AIC23BPWRB is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high- impedance state when either CE or OE is high. This dual line control gives designers flexibility in preventing bus con- tention in their systems. BYTE WRITE: A low pulse on the WE or CE input with CE or WE low (respectively) and OE high initiates a write cycle. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Once a byte write has been started, it will automatically time itself to completion. Once a pro- gramming operation has been initiated and for the duration of t W C , a read operation will effectively be a polling operation. PAGE WRITE: The page write operation of the ATTLV320AIC23BPWRB allows 1 to 64 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; after the first byte is written, it can then be followed by 1 to 63 additional bytes. Each successive byte must be loaded within 150 µs (tBLC) of the previous byte. If the tBLC limit is exceeded, the ATTLV320AIC23BPWRB will cease accepting data and commence the internal programming operation. All bytes during a page write operation must reside on the same page as defined by the state of the A6 to A12 inputs. For each WE high to low transition during the page write opera- tion, A6 to A12 must be the same. The A0 to A5 inputs specify which bytes within the page are to be written. The bytes may be loaded in any order and may be altered within the same load period. Only bytes which are specified for writing will be written; unnecessary cycling of other bytes within the page does not occur. DATA POLLING: The ATTLV320AIC23BPWRB features DATA Polling to indicate the end of a write cycle. During a byte or page write cycle an attempted read of the last byte written will result in the complement of the written data to be presented on I/O 7. Once the write cycle has been completed, true data is valid on all outputs, and the next write cycle may begin. DATA Polling may begin at any time during the write cycle. TOGGLE BIT: In addition to DATA Polling, the ATTLV320AIC23BPWRB provides another method for determining the end of a write cycle. During the write operation, successive attempts to read data from the device will result in I/O 6 toggling between one and zero. Once the write has completed, I/O6 will stop toggling, and valid data will be read. Toggle bit reading may begin at any time during the write cycle.
TLV320AIC23BPWR Applicatioins
Technical/Catalog InformationTLV320AIC23BPWRVendorTexas InstrumentsCategoryIntegrated Circuits (ICs) Type