PS2705A-1-F3-A DataSheet
DATASHEET
PS2705A-1-F3-A Description
A buffered Output Enable (OE) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
PS2705A-1-F3-A Features
The PS2705A-1-F3-A is a 14-bit 3-MSPS A-to-D converter with 2.5-V internal reference. The device includes a capacitor based SAR A/D converter with inherent sample and hold. The device offers a 14-bit parallel interface with an additional byte mode that provides easy interface with 8-bit processors. The device has a pseudo-differential input stage.
PS2705A-1-F3-A Applicatioins
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR−5 = 3.5 X 1.5 inches, using the minimum recommended footprint. 2. Thermal Resistance measurement obtained via infrared Scan Method.