xc17s20pd8c DataSheet
DATASHEET
xc17s20pd8c Description
The CM8560 is a low cost linear regulator designed to provide a desired output voltage or termination voltage for various applications by converting voltage supplies ranging from 1.6V to 6.0V. The desired output voltage could be programmable by two external voltage divider resistors.
xc17s20pd8c Features
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
xc17s20pd8c Applicatioins
A burst write access to an active row is initiated with the WRITE command. BA0, BA1 inputs selects the bank, and the starting column location is provided by inputs A0-A7. Whether or not AUTO-PRECHARGE is used is deter- mined by A10. The row being accessed will be precharged at the end of the WRITE burst, if AUTO PRECHARGE is selected. If AUTO PRECHARGE is not selected, the row will remain open for subsequent accesses. A memory array is written with corresponding input data on DQs and DQM input logic level appearing at the same time. Data will be written to memory when DQM signal is LOW. When DQM is HIGH, the corresponding data inputs will be ignored, and a WRITE will not be executed to that byte/column location.
Relate Parts
Part Number
Quantity
Manufacturer
Date Code
Description
Pricing
10241
11+
PARAMETER Reference Voltage Section Fb Voltage
13752
11+
The floating-point register file is made u
13848
Hardware Reset, active Low. Provides a hardware me
5208
A high on the MASTER RESET (MR) sets all the cont
14048
Addresses and chip enables are registered at risin
16717
The XC5200 Field-Programmable Gate Array Family i
15491
Wiper position programming defaults to midscale a
17695
The CS5381 uses a 5th-order, multi-bit delta-sigma
8886
The mounting area was reduced by mak- ing the tw
13759
The A-to-B enable (CEAB) input must be low in ord
17911
via an RF or an infrared transmission medium upo
4950
Note 2: The maximum power dissipation is dictated
4838
The BRT (Bias Resistor Transistor) contains
4726
The deserializer stays in lock until it cannot de
8877
Output, Pin 14, is suitable for controlling a pow
16717
The XC5200 Field-Programmable Gate Array Family i
14048
Addresses and chip enables are registered at risin
5208
A high on the MASTER RESET (MR) sets all the cont
13848
Hardware Reset, active Low. Provides a hardware me