XC2S100-5TQG144C DataSheet
DATASHEET
XC2S100-5TQG144C Description
IC ground Enable/disable Control input (duty cycle) Duty cycle reduction Attenuation Oscillator Not connected Not connected Status short circuit latch Not connected Short circuit protection delay Current sensing Voltage doubler Output Not connected Supply voltage VS
XC2S100-5TQG144C Features
Hynix HYMD232M646(L)8-K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
XC2S100-5TQG144C Applicatioins
XC2S100-5TQG144C is a trademark of Texas Instruments. Windows is a registered trademark of the Microsoft Corporation. † Throughout the remainder of this document, the XC2S100-5TQG144C, XC2S100-5TQG144CB, XC2S100-5TQG144CC, and XC2S100-5TQG144CD shall be referred to as XC2S100-5TQG144C0C67x or C67x where generic, and where specific, their individual full device part numbers will be used or abbreviated as C6711, C6711B, C6711C, C6711D, 11, 11B, 11C, or 11D, etc.
Relate Parts
Part Number
Quantity
Manufacturer
Date Code
Description
Pricing
10241
11+
PARAMETER Reference Voltage Section Fb Voltage
13752
11+
The floating-point register file is made u
13848
Hardware Reset, active Low. Provides a hardware me
5208
A high on the MASTER RESET (MR) sets all the cont
14048
Addresses and chip enables are registered at risin
16717
The XC5200 Field-Programmable Gate Array Family i
15491
Wiper position programming defaults to midscale a
17695
The CS5381 uses a 5th-order, multi-bit delta-sigma
8886
The mounting area was reduced by mak- ing the tw
13759
The A-to-B enable (CEAB) input must be low in ord
17911
via an RF or an infrared transmission medium upo
4950
Note 2: The maximum power dissipation is dictated
4838
The BRT (Bias Resistor Transistor) contains
4726
The deserializer stays in lock until it cannot de
8877
Output, Pin 14, is suitable for controlling a pow
3499
The challenge for an integrated clock-recovery cir
7530
These data selectors/multiplexers contain invert
6160
These Schottky barrier diodes are designed
19657
• True dual-ported memory cells which allow
18287
The Edge646 driver supports three distinct program
10817
The internal circuit is composed of 2 stages inc